attention: observe precautions for handling electrostatic sensitive devices. esd machine model (class a) = 40v esd human body model (class 1a) = 250v refer to avago application note a004r: electrostatic discharge damage and control. pin function 1 vd 2 vg 3 4 rf out 5 6 7 8 rf in description avago technologies ammp-6120 is an easy-to-use in - tegrated frequency multiplier (x2) in a surface mount package designed for commercial communication systems. the mmic takes a 4 to 12 ghz input signal and doubles it to 8 to 24 ghz. it has integrated amplification, matching, harmonic suppression, and bias networks. the input/output are matched to 50 ? and fully dc blocked. the mmic is fabricated using phemt technology. the backside of the package is both rf and dc ground. this helps simplify the assembly process and reduces assembly related performance variations and costs. the surface mount package allows elimination of chip & wire assembly for lower cost. this mmic is a cost effective al - ternative to hybrid (discrete-fet), passive, and diode doublers that require complex tuning and assembly pro - cesses. package diagram features ? 5x5mm surface mount package ? frequency range : 8-24 ghz output (useable to 26 ghz) ? broad input power range: -11 to +5 dbm ? output power : +16 to +18 dbm ? harmonic suppression : 20 dbc (fundamental) ? dc requirements : -1.4v and 5v, 112 ma @ pin= +3dbm applications ? microwave radio systems ? satellite vsat and dbs systems ? 802.16 & 802.20 wimax bwa systems ? wll and mmds loops functional block diagram ammp-6120 8-24 ghz x2 frequency multiplier data sheet 1 2 3 7 5 6 4 8 rf in rf out vg vd nc nc nc nc note: msl rating = level 2a top view package base: rf and dc gnd 3 vg 2 7 5 6 rfin 8 4 rfout x2 vd 1
2 electrical specifcations 1. small/large -signal data measured in a fully de-embedded test fxture form ta = 25c. 2. pre-assembly into package performance verifed 100% on-wafer. 3. this fnal package part performance is verifed by a functional test correlated to actual performance at one or more frequencies. 4. specifcations are derived from measurements in a 50 ? test environment. aspects of the amplifer performance may be improved over a more narrow bandwidth by application of additional conjugate, linearity, or low noise (opt) matching. table 1. rf electrical characteristics ta=25c, vd=50v, vg=-1.4v, idq=85ma, zin=zout=50 parameter min typ. max unit output power, pout 13 16 dbm input power at 1db gain compression, ip-1db 2 dbm input return loss, rlin -15 db output return loss, rlout -10 db fundamental suppresion, sup 18 25 dbc 3rd harmonic suppression, sup3 25 dbc 4th harmonic suppression, sup4 35 dbc single side band phase noise, ssbpn (@100khz ofset, fout=15.6ghz) -140 dbc table 2. recommended operating range 1. ambient operational temperature ta = 25c unless otherwise noted. 2. channel-to-backside thermal resistance (tchannel (tc) = 34c) as measured using infrared microscopy. thermal re - sistance at backside temperature (tb) = 25c calculated from measured data. description min. typical max. unit comments drain supply current, id 85 110 ma vd = 5v, under any rf power drive and temperature gate current, ig 9 ua table 3. thermal properties parameter test conditions value thermal resistance, q ch-b channel-to-backside thermal resistance tchannel(tc)=34c thermal resistance at backside temperature tb=25c q ch-b = 34 c/w absolute minimum and maximum ratings table 4. minimum and maximum ratings description min. max. unit comments drain supply voltage, vd 7 v gate supply voltage, vg -3.0 +0.5 v drain current, idq 120 ma cw input power, pin 15 dbm channel temperature, tch +150 c storage temperature , tstg -65 +150 c maximum assembly temperature, tmax +300 c 60 second maximum notes: 1. operation in excess of any one of these conditions may result in permanent damage to this device.
3 ammp-6120 typical performances (t a = 25c,z in = z out = 50 ? , vd=5v, vg=-1.4v) figure 3. output power [2h] vs. output freq. at variable pin figure 4. fundamental suppression at variable pin figure 1. output power vs. output freq. @ pin=+3dbm figure 6. variation of total drain current with input power figure 2. output power vs. output freq. over temp @ pin=+3dbm figure 5. input and output return loss -30 -25 -20 -15 -10 -5 0 5 10 15 20 8 10 12 14 16 18 20 22 24 26 output frequency (ghz) output power (dbm) 2h 1h 3h 4h -30 -25 -20 -15 -10 -5 0 5 10 15 20 8 10 12 14 16 18 20 22 24 26 output frequency (ghz) output power (dbm) -40c [2h] +25c [2h] +85c [2h] -40c [1h] +25c [1h] +85c [1h] 10 11 12 13 14 15 16 17 18 19 8 10 12 14 16 18 20 22 24 26 output frequency (ghz) output power [2h] (dbm) pin=-2dbm pin= 0dbm pin=+2dbm pin=+4dbm 10 15 20 25 30 35 40 8 10 12 14 16 18 20 22 24 26 output frequency [ghz] suppression [1h] (dbc) pin=-2dbm pin= 0dbm pin=+2dbm pin=+4dbm -30 -25 -20 -15 -10 -5 0 4 6 8 10 12 14 16 18 20 22 24 26 frequncy (ghz) i/p & o/p return loss (db) s11 s22 80 90 100 110 120 130 140 150 160 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) total drain current [id] (ma) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v
4 figure 11. 2h output power vs input power @ fout=14ghz figure 12. fundamental supp. vs input power @ fout=14ghz figure 9. 2h output power vs input power @ fout=10ghz figure 10. fundamental supp. vs input power @ fout=10ghz figure 7. 2h output power vs input power @ fout=8ghz figure 8. fundamental supp. vs input power @ fout=8ghz 0 2 4 6 8 10 12 14 16 18 20 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) output power [2h] (dbm) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v fout=8ghz 20 25 30 35 40 45 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) suppression [1h] (dbc) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v fout=8ghz 0 2 4 6 8 10 12 14 16 18 20 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) output power [2h] (dbm) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v fout=10ghz 20 25 30 35 40 45 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) suppression [1h] (dbc) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v fout=10ghz 0 2 4 6 8 10 12 14 16 18 20 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) output power [2h] (dbm) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v fout=14ghz 10 15 20 25 30 35 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) suppression [1h] (dbc) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v fout=14ghz
5 figure 15. 2h output power vs input power @ fout=20ghz figure 17. 2h output power vs input power @ fout=22ghz figure 14. fundamental supp. vs input power @ fout=16ghz figure 13. 2h output power vs input power @ fout=16ghz figure 16. fundamental supp. vs input power @ fout=20ghz figure 18. fundamental supp. vs input power @ fout=22ghz 0 2 4 6 8 10 12 14 16 18 20 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) output power [2h] (dbm) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v fout=16ghz 10 15 20 25 30 35 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) suppression [1h] (dbc) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v fout=16gh 0 2 4 6 8 10 12 14 16 18 20 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) output power [2h] (dbm) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v fout=20ghz 5 10 15 20 25 30 35 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) suppression [1h] (dbc) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v fout=20ghz 0 2 4 6 8 10 12 14 16 18 20 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) output power [2h] (dbm) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v fout=22ghz 5 10 15 20 25 30 35 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) suppression [1h] (dbc) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v fout=22ghz
6 0 2 4 6 8 10 12 14 16 18 20 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) output power [2h] (dbm) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v fout=26ghz vd=4.5v, vg=-1.2v 5 10 15 20 25 30 35 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 input power [1h] (dbm) suppression [1h] (-dbc) vg=-1.2v, vd=4.5v vg=-1.2v, vd=5.0v vg=-1.4v, vd=4.5v vg=-1.4v, vd=5.0v fout=26ghz -170 -160 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 1.e+02 1.e+03 1.e+04 1.e+05 1.e+06 1.e+07 o set frequency [hz] ssb phase noise (dbc/hz) fout=15.6ghz active balun s f1 f2 filter @ 2fo m/n @ fo amp figure 22. top level schematic of frequency doubler figure 21. ssb phase noise of frequency doubler (pin=+2dbm, fout=15.6ghz) biasing and operation the frequency doubler mmic consists of a balun. the outputs of this balun feed the gates of balanced fets and the drains are connected to form the single-ended output. this results in fundamental frequency & odd harmon - ics cancellation. the even harmonic drain currents are in phase and thus add in phase. the input matching network (m/n) is designed to provide good match at fundamental frequencies and produces high impedance mismatch to higher harmonics. the ammp-6120 is biased with a single positive drain supply vdd and a single negative gate supply using sepa - rate bypass capacitors. it is normally biased with the drain supply connected to vd and the gate supply connected to vg. for most applications it is recommended to use a vg =-1.2v to -1.4v and vd=4.5v to 5.0v. the rf input and output ports are ac coupled thus no dc voltage is present at either port. the ground connection is made via the package base. the ammp-6120 performance changes with drain voltage (vd) and gate bias (vg) as shown in the previous graphs. improvements in output power or fundamental suppres - sion performance are possible by optimizing the vg from -1.2v to -1.4v and/or vd from 4.5 to 5.0v. a simplified schematic of the frequency multiplier is shown in figure 22. the active balun circuit and the output amplifier of the circuit are self biased. the vg negative bias (below pinch off ) is only applied to fets f1 and f2. fets f1 and f2 have no significant contribution to total drain current therefore vg cannot be used to set drain current. it should only be used to optimize the output power and fundamental & higher harmonics suppression of the doubler. refer to the absolute maximum ratings table for allowed dc and thermal conditions. figure 19 . 2h output power vs input power @ fout=26ghz figure 20 . fundamental supp. vs input power @ fout=26ghz
for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. copyright ? 2005-2013 avago technologies. all rights reserved. obsoletes av01-0119en av02-0441en - july 8, 2013 ammp-6120 part number ordering information part number devices per container container AMMP-6120-BLK 10 antistatic bag ammp-6120-tr1 100 7 reel ammp-6120-tr2 500 7 reel typical scattering parameters please refer to for typical scattering parameters data. package dimension, pcb layout and tape and reel information please refer to avago technologies application note 5520, amxp-xxxx production assembly process (land pattern a).
|
